px4_fmu-v5x:P2 Base migrating to LAN8742Ai phy #14121
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
davids5
force-pushed
the
master_v5x_LAN8742Ai
branch
from
b031555 to
bef956c
Compare
LorenzMeier
approved these changes
Feb 8, 2020
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
For reduced components count and size savings, the FMUv5X base will be using a Microchip (Formerly Micrel) LAN8742Ai PHY instead of the the TI DP83TC811R-Q1.
This PR supports that migration.
use
make px4_fmu-v5xon P1 Hardwareuse
make px4_fmu-v5x_p2_base_phy_LAN8742Aion P2 HardwareEventually the P1 Hardware will be deprecated and make px4_fmu-v5x will be replaced by with the LAN8742Ai config and the v5x_p2_base_phy_LAN8742Ai config will be removed.
Future Enhancement
Currently the PHY config is compile time only. 99% of it is chip independent. We could upstream a board IOCTL to get the chip specific PHY param. I.E PhyAddress, Special config reg address, and masks for speed and duplex setting. Then use the HW manifest and base eeprom to support either.
@dinomani @eyeam3