cm5 io: add waveshare spi lcd support

Signed-off-by: Nascs Fang <[email protected]>

arch/arm64/boot/dts/rockchip/overlays/Makefile

@@ -337,6 +337,7 @@ dtb-$(CONFIG_CLK_RK3588) += \
 	rk3588-spi0-m0-cs0-spidev.dtbo \
 	rk3588-spi0-m1-cs0-mcp2515-8mhz.dtbo \
 	rk3588-spi0-m1-cs0-spidev.dtbo \
+	rk3588-spi0-m1-cs0-waveshare35.dtbo \
 	rk3588-spi0-m1-cs1-spidev.dtbo \
 	rk3588-spi0-m2-cs0-mcp2515-8mhz.dtbo \
 	rk3588-spi0-m2-cs0-spidev.dtbo \

arch/arm64/boot/dts/rockchip/overlays/rk3588-spi0-m1-cs0-waveshare35.dts

@@ -0,0 +1,44 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+	metadata {
+		title = "Enable Waveshare 3.5 inch Display on SPI0";
+		compatible = "radxa,cm5-io";
+		category = "misc";
+		exclusive = "GPIO1_B1", "GPIO1_D5", "GPIO4_A0", "GPIO4_A1", "GPIO4_A2", "GPIO4_B2" ;
+		description = "Enable Waveshare 3.5 inch Display on SPI0.";
+	};
+
+	fragment@0 {
+		target = <&spi0>;
+
+		__overlay__ {
+			status = "okay";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi0m1_cs0 &spi0m1_pins>;
+			max-freq = <16000000>;
+
+			ili9486@0 {
+				compatible = "ilitek,ili9486";
+				reg = <0>;
+				spi-max-frequency = <16000000>;
+				txbuflen = <32768>;
+				rotate = <90>;
+				bgr = <0>;
+				fps = <30>;
+				buswidth = <8>;
+				regwidth = <16>;
+				reset-gpios = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; // GPIO1_B1
+				dc-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; // GPIO1_D5
+				debug = <0>;
+			};
+		};
+	};
+};