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mcuboot supports the stm32 external flash in XiP mode #2154
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y | ||
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
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/* | ||
* Copyright (c) 2024 STMicroelectronics | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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&xspi1 { | ||
/* same pining as xspi2 */ | ||
pinctrl-0 = <&xspim_p2_clk_pn6 &xspim_p2_ncs1_pn1 | ||
&xspim_p2_io0_pn2 &xspim_p2_io1_pn3 | ||
&xspim_p2_io2_pn4 &xspim_p2_io3_pn5 | ||
&xspim_p2_io4_pn8 &xspim_p2_io5_pn9 | ||
&xspim_p2_io6_pn10 &xspim_p2_io7_pn11 | ||
&xspim_p2_dqs0_pn0>; | ||
pinctrl-names = "default"; | ||
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status = "okay"; | ||
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mx66uw1g45: xspi-nor-flash@72000000 { | ||
compatible = "st,stm32-xspi-nor"; | ||
reg = <0x72000000 DT_SIZE_M(96)>; /* bank1 - 3*/ | ||
ospi-max-frequency = <DT_FREQ_M(50)>; | ||
spi-bus-width = <XSPI_OCTO_MODE>; | ||
data-rate = <XSPI_DTR_TRANSFER>; | ||
status = "okay"; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. this should be in the upstream zephyr board so it's visible to everything There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. The xspi1 node is not enabled in the zephyr boards/st/stm32h7s78_dk/ There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. @FRASTM I think this can be dropped from this PR since Zephyr STM32 XSPI driver doesn't support H7RS series yet (if I'm not mistaken). |
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#address-cells = <1>; | ||
#size-cells = <1>; | ||
/* bank1 */ | ||
slot1_partition: partition@0000000 { | ||
label = "image-1"; | ||
reg = <0x0000000 DT_SIZE_K(416)>; | ||
}; | ||
/* bank2 */ | ||
scratch_partition: partition@2000000 { | ||
label = "image-scratch"; | ||
reg = <0x2000000 DT_SIZE_M(32)>; | ||
}; | ||
/* bank3 */ | ||
storage_partition: partition@4000000 { | ||
label = "storage"; | ||
reg = <0x4000000 DT_SIZE_M(32)>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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CONFIG_BOOT_DIRECT_XIP=y | ||
CONFIG_STM32_MEMMAP=y |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
@FRASTM I had to add
CONFIG_BOOT_MAX_IMG_SECTORS_AUTO=n CONFIG_BOOT_MAX_IMG_SECTORS=256
as well to get it working.With the following memory layout in board dts: