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andykaylorandykaylor
authoredFeb 21, 2025
[CIR] Fix Address element type problems (llvm#1373)
There were problems with the pointer type and element type of the Address class getting out of sync. In the traditional codegen the pointer has no type, so it was sufficient for the Address class to simply track the type it was supposed to be pointing to. Since ClangIR pointer values are typed, the Address::withType function wasn't really doing what it was supposed to. It returned an object with the same pointer that the original object had, but with a mismatched element type. This change updates the Address::withType function to perform a bitcast to get the expected pointer type before creating a new Address object. It also adds assertions in the Address class to verify that pointer type and element type are consistent and updates many places that were causing those assertions to fire. These code changes cause extra bitcasts to be emitted in a few places. Regression tests have been updated as needed to reflect the CIR that is now generated.
1 parent 5f68f6c commit a1ab6bf

19 files changed

+91
-60
lines changed
 

‎clang/lib/CIR/CodeGen/Address.h

+15-9
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,9 @@
2525

2626
namespace clang::CIRGen {
2727

28+
// Forward declaration to avoid a circular dependency
29+
class CIRGenBuilderTy;
30+
2831
// Indicates whether a pointer is known not to be null.
2932
enum KnownNonNull_t { NotKnownNonNull, KnownNonNull };
3033

@@ -64,6 +67,9 @@ class Address {
6467
assert(pointer && "Pointer cannot be null");
6568
assert(elementType && "Element type cannot be null");
6669
assert(!alignment.isZero() && "Alignment cannot be zero");
70+
71+
assert(mlir::cast<cir::PointerType>(pointer.getType()).getPointee() ==
72+
ElementType);
6773
}
6874

6975
Address(mlir::Value basePtr, mlir::Type elementType,
@@ -104,15 +110,9 @@ class Address {
104110

105111
bool hasOffset() const { return bool(offset); }
106112

107-
/// Return address with different element type, but same pointer and
108-
/// alignment.
109-
Address withElementType(mlir::Type ElemTy) const {
110-
if (!hasOffset())
111-
return Address(getBasePointer(), ElemTy, getAlignment(),
112-
getPointerAuthInfo(), /*Offset=*/nullptr,
113-
isKnownNonNull());
114-
return Address(getPointer(), ElemTy, getAlignment(), isKnownNonNull());
115-
}
113+
/// Return address with different element type, a bitcast pointer, and
114+
/// the same alignment.
115+
Address withElementType(CIRGenBuilderTy &builder, mlir::Type ElemTy) const;
116116

117117
mlir::Value getPointer() const {
118118
assert(isValid());
@@ -142,11 +142,17 @@ class Address {
142142

143143
/// Return the type of the pointer value.
144144
cir::PointerType getType() const {
145+
assert(mlir::cast<cir::PointerType>(
146+
PointerAndKnownNonNull.getPointer().getType())
147+
.getPointee() == ElementType);
145148
return mlir::cast<cir::PointerType>(getPointer().getType());
146149
}
147150

148151
mlir::Type getElementType() const {
149152
assert(isValid());
153+
assert(mlir::cast<cir::PointerType>(
154+
PointerAndKnownNonNull.getPointer().getType())
155+
.getPointee() == ElementType);
150156
return ElementType;
151157
}
152158

‎clang/lib/CIR/CodeGen/CIRAsm.cpp

+6-4
Original file line numberDiff line numberDiff line change
@@ -214,8 +214,9 @@ std::pair<mlir::Value, mlir::Type> CIRGenFunction::emitAsmInputLValue(
214214
getTargetHooks().isScalarizableAsmOperand(*this, Ty)) {
215215
Ty = cir::IntType::get(&getMLIRContext(), Size, false);
216216

217-
return {builder.createLoad(getLoc(Loc),
218-
InputValue.getAddress().withElementType(Ty)),
217+
return {builder.createLoad(
218+
getLoc(Loc),
219+
InputValue.getAddress().withElementType(builder, Ty)),
219220
mlir::Type()};
220221
}
221222
}
@@ -320,7 +321,7 @@ static void emitAsmStores(CIRGenFunction &CGF, const AsmStmt &S,
320321
// ResultTypeRequiresCast.size() elements of RegResults.
321322
if ((i < ResultTypeRequiresCast.size()) && ResultTypeRequiresCast[i]) {
322323
unsigned Size = CGF.getContext().getTypeSize(ResultRegQualTys[i]);
323-
Address A = Dest.getAddress().withElementType(ResultRegTypes[i]);
324+
Address A = Dest.getAddress().withElementType(Builder, ResultRegTypes[i]);
324325
if (CGF.getTargetHooks().isScalarizableAsmOperand(CGF, TruncTy)) {
325326
Builder.createStore(CGF.getLoc(S.getAsmLoc()), Tmp, A);
326327
continue;
@@ -478,7 +479,8 @@ mlir::LogicalResult CIRGenFunction::emitAsmStmt(const AsmStmt &S) {
478479
// Otherwise there will be a mis-match if the matrix is also an
479480
// input-argument which is represented as vector.
480481
if (isa<MatrixType>(OutExpr->getType().getCanonicalType()))
481-
DestAddr = DestAddr.withElementType(convertType(OutExpr->getType()));
482+
DestAddr =
483+
DestAddr.withElementType(builder, convertType(OutExpr->getType()));
482484

483485
ArgTypes.push_back(DestAddr.getType());
484486
ArgElemTypes.push_back(DestAddr.getElementType());

‎clang/lib/CIR/CodeGen/CIRGenAtomic.cpp

+8-5
Original file line numberDiff line numberDiff line change
@@ -305,7 +305,7 @@ Address AtomicInfo::castToAtomicIntPointer(Address addr) const {
305305
if (intTy && intTy.getWidth() == AtomicSizeInBits)
306306
return addr;
307307
auto ty = CGF.getBuilder().getUIntNTy(AtomicSizeInBits);
308-
return addr.withElementType(ty);
308+
return addr.withElementType(CGF.getBuilder(), ty);
309309
}
310310

311311
Address AtomicInfo::convertToAtomicIntPointer(Address Addr) const {
@@ -1243,8 +1243,9 @@ RValue CIRGenFunction::emitAtomicExpr(AtomicExpr *E) {
12431243
if (RValTy->isVoidType())
12441244
return RValue::get(nullptr);
12451245

1246-
return convertTempToRValue(Dest.withElementType(convertTypeForMem(RValTy)),
1247-
RValTy, E->getExprLoc());
1246+
return convertTempToRValue(
1247+
Dest.withElementType(builder, convertTypeForMem(RValTy)), RValTy,
1248+
E->getExprLoc());
12481249
}
12491250

12501251
// The memory order is not known at compile-time. The atomic operations
@@ -1321,8 +1322,10 @@ RValue CIRGenFunction::emitAtomicExpr(AtomicExpr *E) {
13211322

13221323
if (RValTy->isVoidType())
13231324
return RValue::get(nullptr);
1324-
return convertTempToRValue(Dest.withElementType(convertTypeForMem(RValTy)),
1325-
RValTy, E->getExprLoc());
1325+
1326+
return convertTempToRValue(
1327+
Dest.withElementType(builder, convertTypeForMem(RValTy)), RValTy,
1328+
E->getExprLoc());
13261329
}
13271330

13281331
void CIRGenFunction::emitAtomicStore(RValue rvalue, LValue lvalue,

‎clang/lib/CIR/CodeGen/CIRGenBuilder.cpp

+13-1
Original file line numberDiff line numberDiff line change
@@ -133,4 +133,16 @@ uint64_t CIRGenBuilderTy::computeOffsetFromGlobalViewIndices(
133133
}
134134

135135
return offset;
136-
}
136+
}
137+
138+
// This can't be defined in Address.h because that file is included by
139+
// CIRGenBuilder.h
140+
Address Address::withElementType(CIRGenBuilderTy &builder,
141+
mlir::Type ElemTy) const {
142+
if (!hasOffset())
143+
return Address(builder.createPtrBitcast(getBasePointer(), ElemTy), ElemTy,
144+
getAlignment(), getPointerAuthInfo(), /*Offset=*/nullptr,
145+
isKnownNonNull());
146+
return Address(builder.createPtrBitcast(getPointer(), ElemTy), ElemTy,
147+
getAlignment(), isKnownNonNull());
148+
}

‎clang/lib/CIR/CodeGen/CIRGenBuilder.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -733,7 +733,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
733733
auto ptrTy = getPointerTo(destType);
734734
auto baseAddr = create<cir::BaseClassAddrOp>(
735735
loc, ptrTy, addr.getPointer(), mlir::APInt(64, offset), assumeNotNull);
736-
return Address(baseAddr, ptrTy, addr.getAlignment());
736+
return Address(baseAddr, destType, addr.getAlignment());
737737
}
738738

739739
Address createDerivedClassAddr(mlir::Location loc, Address addr,
@@ -745,7 +745,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
745745
auto ptrTy = getPointerTo(destType);
746746
auto derivedAddr = create<cir::DerivedClassAddrOp>(
747747
loc, ptrTy, addr.getPointer(), mlir::APInt(64, offset), assumeNotNull);
748-
return Address(derivedAddr, ptrTy, addr.getAlignment());
748+
return Address(derivedAddr, destType, addr.getAlignment());
749749
}
750750

751751
mlir::Value createVTTAddrPoint(mlir::Location loc, mlir::Type retTy,

‎clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -4502,7 +4502,7 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
45024502
}
45034503
case NEON::BI__builtin_neon_vld1_dup_v:
45044504
case NEON::BI__builtin_neon_vld1q_dup_v: {
4505-
Address ptrAddr = PtrOp0.withElementType(vTy.getEltType());
4505+
Address ptrAddr = PtrOp0.withElementType(builder, vTy.getEltType());
45064506
mlir::Value val = builder.createLoad(getLoc(E->getExprLoc()), ptrAddr);
45074507
cir::VecSplatOp vecSplat =
45084508
builder.create<cir::VecSplatOp>(getLoc(E->getExprLoc()), vTy, val);

‎clang/lib/CIR/CodeGen/CIRGenCXX.cpp

+1-2
Original file line numberDiff line numberDiff line change
@@ -408,8 +408,7 @@ void CIRGenModule::emitCXXGlobalVarDeclInit(const VarDecl *varDecl,
408408
builder.setInsertionPointToStart(block);
409409
auto getGlobal = builder.createGetGlobal(addr);
410410

411-
Address declAddr(getGlobal, getGlobal.getType(),
412-
getASTContext().getDeclAlign(varDecl));
411+
Address declAddr(getGlobal, getASTContext().getDeclAlign(varDecl));
413412
assert(performInit && "cannot have constant initializer which needs "
414413
"destruction for reference");
415414
RValue rv = cgf.emitReferenceBindingToExpr(init);

‎clang/lib/CIR/CodeGen/CIRGenClass.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1672,7 +1672,7 @@ CIRGenFunction::getAddressOfBaseClass(Address Value,
16721672
VBase, BaseValueTy, not NullCheckValue);
16731673

16741674
// Cast to the destination type.
1675-
Value = Value.withElementType(BaseValueTy);
1675+
Value = Value.withElementType(builder, BaseValueTy);
16761676

16771677
return Value;
16781678
}
@@ -1894,7 +1894,7 @@ void CIRGenFunction::emitCXXAggrConstructorCall(
18941894
builder.create<cir::ArrayCtor>(
18951895
*currSrcLoc, arrayOp, [&](mlir::OpBuilder &b, mlir::Location loc) {
18961896
auto arg = b.getInsertionBlock()->addArgument(ptrToElmType, loc);
1897-
Address curAddr = Address(arg, ptrToElmType, eltAlignment);
1897+
Address curAddr = Address(arg, elementType, eltAlignment);
18981898
auto currAVS = AggValueSlot::forAddr(
18991899
curAddr, type.getQualifiers(), AggValueSlot::IsDestructed,
19001900
AggValueSlot::DoesNotNeedGCBarriers, AggValueSlot::IsNotAliased,

‎clang/lib/CIR/CodeGen/CIRGenDecl.cpp

+3-6
Original file line numberDiff line numberDiff line change
@@ -244,11 +244,8 @@ static void emitStoresForConstant(CIRGenModule &CGM, const VarDecl &D,
244244
// FIXME(cir): This is closer to memcpy behavior but less optimal, instead of
245245
// copy from a global, we just create a cir.const out of it.
246246

247-
if (addr.getElementType() != Ty) {
248-
auto ptr = addr.getPointer();
249-
ptr = builder.createBitcast(ptr.getLoc(), ptr, builder.getPointerTo(Ty));
250-
addr = addr.withPointer(ptr, addr.isKnownNonNull());
251-
}
247+
if (addr.getElementType() != Ty)
248+
addr = addr.withElementType(builder, Ty);
252249

253250
auto loc = CGM.getLoc(D.getSourceRange());
254251
builder.createStore(loc, builder.getConstant(loc, constant), addr);
@@ -1108,7 +1105,7 @@ void CIRGenFunction::emitArrayDestroy(mlir::Value begin, mlir::Value end,
11081105
builder.create<cir::ArrayDtor>(
11091106
*currSrcLoc, begin, [&](mlir::OpBuilder &b, mlir::Location loc) {
11101107
auto arg = b.getInsertionBlock()->addArgument(ptrToElmType, loc);
1111-
Address curAddr = Address(arg, ptrToElmType, elementAlign);
1108+
Address curAddr = Address(arg, cirElementType, elementAlign);
11121109
if (useEHCleanup) {
11131110
pushRegularPartialArrayCleanup(arg, arg, elementType, elementAlign,
11141111
destroyer);

‎clang/lib/CIR/CodeGen/CIRGenException.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -237,7 +237,7 @@ void CIRGenFunction::emitAnyExprToExn(const Expr *e, Address addr) {
237237
// __cxa_allocate_exception returns a void*; we need to cast this
238238
// to the appropriate type for the object.
239239
auto ty = convertTypeForMem(e->getType());
240-
Address typedAddr = addr.withElementType(ty);
240+
Address typedAddr = addr.withElementType(builder, ty);
241241

242242
// From LLVM's codegen:
243243
// FIXME: this isn't quite right! If there's a final unelided call

‎clang/lib/CIR/CodeGen/CIRGenExpr.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -2938,7 +2938,7 @@ mlir::Value CIRGenFunction::emitLoadOfScalar(Address addr, bool isVolatile,
29382938
CGM.getABIInfo().getOptimalVectorMemoryType(vTy, getLangOpts());
29392939

29402940
if (vTy != newVecTy) {
2941-
const Address cast = addr.withElementType(newVecTy);
2941+
const Address cast = addr.withElementType(builder, newVecTy);
29422942
mlir::Value v = builder.createLoad(loc, cast, isVolatile);
29432943
const uint64_t oldNumElements = vTy.getSize();
29442944
SmallVector<int64_t, 16> mask(oldNumElements);

‎clang/lib/CIR/CodeGen/CIRGenExprAgg.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -999,7 +999,8 @@ void AggExprEmitter::VisitCastExpr(CastExpr *E) {
999999

10001000
// GCC union extension
10011001
QualType Ty = E->getSubExpr()->getType();
1002-
Address CastPtr = Dest.getAddress().withElementType(CGF.convertType(Ty));
1002+
Address CastPtr = Dest.getAddress().withElementType(CGF.getBuilder(),
1003+
CGF.convertType(Ty));
10031004
emitInitializationToLValue(E->getSubExpr(),
10041005
CGF.makeAddrLValue(CastPtr, Ty));
10051006
break;

‎clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp

+8-6
Original file line numberDiff line numberDiff line change
@@ -379,7 +379,7 @@ static void emitNullBaseClassInitialization(CIRGenFunction &CGF,
379379
if (Base->isEmpty())
380380
return;
381381

382-
DestPtr = DestPtr.withElementType(CGF.UInt8Ty);
382+
DestPtr = DestPtr.withElementType(CGF.getBuilder(), CGF.UInt8Ty);
383383

384384
const ASTRecordLayout &Layout = CGF.getContext().getASTRecordLayout(Base);
385385
CharUnits NVSize = Layout.getNonVirtualSize();
@@ -1049,8 +1049,7 @@ void CIRGenFunction::emitNewArrayInitializer(
10491049
if (const ConstantArrayType *CAT = dyn_cast_or_null<ConstantArrayType>(
10501050
AllocType->getAsArrayTypeUnsafe())) {
10511051
ElementTy = convertTypeForMem(AllocType);
1052-
auto CastOp = builder.createPtrBitcast(CurPtr.getPointer(), ElementTy);
1053-
CurPtr = Address(CastOp, ElementTy, CurPtr.getAlignment());
1052+
CurPtr = CurPtr.withElementType(builder, ElementTy);
10541053
InitListElements *= getContext().getConstantArrayElementCount(CAT);
10551054
}
10561055

@@ -1095,7 +1094,7 @@ void CIRGenFunction::emitNewArrayInitializer(
10951094
}
10961095

10971096
// Switch back to initializing one base element at a time.
1098-
CurPtr = CurPtr.withElementType(BeginPtr.getElementType());
1097+
CurPtr = CurPtr.withElementType(builder, BeginPtr.getElementType());
10991098
}
11001099

11011100
// If all elements have already been initialized, skip any further
@@ -1134,7 +1133,7 @@ void CIRGenFunction::emitNewArrayInitializer(
11341133
if (InitListElements)
11351134
llvm_unreachable("NYI");
11361135
auto arrayType = convertType(CCE->getType());
1137-
CurPtr = CurPtr.withElementType(arrayType);
1136+
CurPtr = CurPtr.withElementType(builder, arrayType);
11381137
emitCXXAggrConstructorCall(Ctor, NumElements, CurPtr, CCE,
11391138
/*NewPointerIsChecked*/ true,
11401139
CCE->requiresZeroInitialization());
@@ -1412,7 +1411,10 @@ mlir::Value CIRGenFunction::emitCXXNewExpr(const CXXNewExpr *E) {
14121411
allocationAlign, getContext().toCharUnitsFromBits(AllocatorAlign));
14131412
}
14141413

1415-
allocation = Address(RV.getScalarVal(), UInt8Ty, allocationAlign);
1414+
auto allocPtr = RV.getScalarVal();
1415+
allocation = Address(
1416+
allocPtr, mlir::cast<cir::PointerType>(allocPtr.getType()).getPointee(),
1417+
allocationAlign);
14161418
}
14171419

14181420
// Emit a null check on the allocation result if the allocation

‎clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp

+2-2
Original file line numberDiff line numberDiff line change
@@ -1606,8 +1606,8 @@ mlir::Value ScalarExprEmitter::VisitCastExpr(CastExpr *CE) {
16061606
mlir::Value DestPtr = CGF.getBuilder().createBitcast(
16071607
CGF.getLoc(E->getExprLoc()), SourceAddr.getPointer(), DestPtrTy);
16081608

1609-
Address DestAddr =
1610-
SourceAddr.withPointer(DestPtr).withElementType(DestElemTy);
1609+
Address DestAddr = Address(DestPtr, DestElemTy, SourceAddr.getAlignment(),
1610+
SourceAddr.isKnownNonNull());
16111611
LValue DestLVal = CGF.makeAddrLValue(DestAddr, DestTy);
16121612
DestLVal.setTBAAInfo(TBAAAccessInfo::getMayAliasInfo());
16131613
return emitLoadOfLValue(DestLVal, CE->getExprLoc());

‎clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp

+11-5
Original file line numberDiff line numberDiff line change
@@ -2386,8 +2386,10 @@ mlir::Value CIRGenItaniumCXXABI::getVirtualBaseClassOffset(
23862386
loc, Address(VBaseOffsetPtr, CGM.SInt32Ty,
23872387
CharUnits::fromQuantity(4))); // vbase.offset
23882388
} else {
2389+
auto OffsetPtr = CGF.getBuilder().createBitcast(
2390+
VBaseOffsetPtr, CGF.getBuilder().getPointerTo(CGM.PtrDiffTy));
23892391
VBaseOffset = CGF.getBuilder().createLoad(
2390-
loc, Address(VBaseOffsetPtr, CGM.PtrDiffTy,
2392+
loc, Address(OffsetPtr, CGM.PtrDiffTy,
23912393
CGF.getPointerAlign())); // vbase.offset
23922394
}
23932395
return VBaseOffset;
@@ -2744,11 +2746,13 @@ Address CIRGenItaniumCXXABI::initializeArrayCookie(CIRGenFunction &CGF,
27442746
auto OffsetOp = CGF.getBuilder().getSignedInt(
27452747
Loc, CookieOffset.getQuantity(), /*width=*/32);
27462748
auto DataPtr = CGF.getBuilder().createPtrStride(Loc, CastOp, OffsetOp);
2747-
CookiePtr = Address(DataPtr, NewPtr.getType(), NewPtr.getAlignment());
2749+
CookiePtr =
2750+
Address(DataPtr, CGF.getBuilder().getUIntNTy(8), NewPtr.getAlignment());
27482751
}
27492752

27502753
// Write the number of elements into the appropriate slot.
2751-
Address NumElementsPtr = CookiePtr.withElementType(CGF.SizeTy);
2754+
Address NumElementsPtr =
2755+
CookiePtr.withElementType(CGF.getBuilder(), CGF.SizeTy);
27522756
CGF.getBuilder().createStore(Loc, NumElements, NumElementsPtr);
27532757

27542758
if (CGF.SanOpts.has(SanitizerKind::Address))
@@ -2761,7 +2765,8 @@ Address CIRGenItaniumCXXABI::initializeArrayCookie(CIRGenFunction &CGF,
27612765
NewPtr.getPointer(), CGF.getBuilder().getUIntNTy(8));
27622766
auto OffsetOp = CGF.getBuilder().getSignedInt(Loc, Offset, /*width=*/32);
27632767
auto DataPtr = CGF.getBuilder().createPtrStride(Loc, CastOp, OffsetOp);
2764-
return Address(DataPtr, NewPtr.getType(), NewPtr.getAlignment());
2768+
return Address(DataPtr, CGF.getBuilder().getUIntNTy(8),
2769+
NewPtr.getAlignment());
27652770
}
27662771

27672772
CharUnits CIRGenARMCXXABI::getArrayCookieSizeImpl(QualType elementType) {
@@ -2812,5 +2817,6 @@ Address CIRGenARMCXXABI::initializeArrayCookie(CIRGenFunction &cgf,
28122817
auto castOp = cgf.getBuilder().createPtrBitcast(
28132818
newPtr.getPointer(), cgf.getBuilder().getUIntNTy(8));
28142819
dataPtr = cgf.getBuilder().createPtrStride(loc, castOp, offsetOp);
2815-
return Address(dataPtr, newPtr.getType(), newPtr.getAlignment());
2820+
return Address(dataPtr, cgf.getBuilder().getUIntNTy(8),
2821+
newPtr.getAlignment());
28162822
}

‎clang/test/CIR/CodeGen/atomic-thread-fence.c

+6-4
Original file line numberDiff line numberDiff line change
@@ -87,10 +87,11 @@ void loadWithThreadFence(DataPtr d) {
8787
// CIR: %[[LOAD_DATA:.*]] = cir.load %[[DATA]] : !cir.ptr<!cir.ptr<!ty_Data>>, !cir.ptr<!ty_Data>
8888
// CIR: %[[DATA_VALUE:.*]] = cir.get_member %[[LOAD_DATA]][1] {name = "ptr"} : !cir.ptr<!ty_Data> -> !cir.ptr<!cir.ptr<!void>>
8989
// CIR: %[[CASTED_DATA_VALUE:.*]] = cir.cast(bitcast, %[[DATA_VALUE]] : !cir.ptr<!cir.ptr<!void>>), !cir.ptr<!u64i>
90-
// CIR: %[[ATOMIC_LOAD:.*]] = cir.load atomic(seq_cst) %[[CASTED_DATA_VALUE]] : !cir.ptr<!u64i>, !u64i
9190
// CIR: %[[CASTED_ATOMIC_TEMP:.*]] = cir.cast(bitcast, %[[ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>), !cir.ptr<!u64i>
91+
// CIR: %[[ATOMIC_LOAD:.*]] = cir.load atomic(seq_cst) %[[CASTED_DATA_VALUE]] : !cir.ptr<!u64i>, !u64i
9292
// CIR: cir.store %[[ATOMIC_LOAD]], %[[CASTED_ATOMIC_TEMP]] : !u64i, !cir.ptr<!u64i>
93-
// CIR: %[[ATOMIC_LOAD_PTR:.*]] = cir.load %[[ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void>
93+
// CIR: %[[DOUBLE_CASTED_ATOMIC_TEMP:.*]] = cir.cast(bitcast, %[[CASTED_ATOMIC_TEMP]] : !cir.ptr<!u64i>), !cir.ptr<!cir.ptr<!void>>
94+
// CIR: %[[ATOMIC_LOAD_PTR:.*]] = cir.load %[[DOUBLE_CASTED_ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void>
9495
// CIR: cir.return
9596

9697
// LLVM-LABEL: @loadWithThreadFence
@@ -115,10 +116,11 @@ void loadWithSignalFence(DataPtr d) {
115116
// CIR: %[[LOAD_DATA:.*]] = cir.load %[[DATA]] : !cir.ptr<!cir.ptr<!ty_Data>>, !cir.ptr<!ty_Data>
116117
// CIR: %[[DATA_PTR:.*]] = cir.get_member %[[LOAD_DATA]][1] {name = "ptr"} : !cir.ptr<!ty_Data> -> !cir.ptr<!cir.ptr<!void>>
117118
// CIR: %[[CASTED_DATA_PTR:.*]] = cir.cast(bitcast, %[[DATA_PTR]] : !cir.ptr<!cir.ptr<!void>>), !cir.ptr<!u64i>
118-
// CIR: %[[ATOMIC_LOAD:.*]] = cir.load atomic(seq_cst) %[[CASTED_DATA_PTR]] : !cir.ptr<!u64i>, !u64i
119119
// CIR: %[[CASTED_ATOMIC_TEMP:.*]] = cir.cast(bitcast, %[[ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>), !cir.ptr<!u64i>
120+
// CIR: %[[ATOMIC_LOAD:.*]] = cir.load atomic(seq_cst) %[[CASTED_DATA_PTR]] : !cir.ptr<!u64i>, !u64i
120121
// CIR: cir.store %[[ATOMIC_LOAD]], %[[CASTED_ATOMIC_TEMP]] : !u64i, !cir.ptr<!u64i>
121-
// CIR: %[[LOAD_ATOMIC_TEMP:.*]] = cir.load %[[ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void>
122+
// CIR: %[[DOUBLE_CASTED_ATOMIC_TEMP:.*]] = cir.cast(bitcast, %[[CASTED_ATOMIC_TEMP]] : !cir.ptr<!u64i>), !cir.ptr<!cir.ptr<!void>>
123+
// CIR: %[[LOAD_ATOMIC_TEMP:.*]] = cir.load %[[DOUBLE_CASTED_ATOMIC_TEMP]] : !cir.ptr<!cir.ptr<!void>>, !cir.ptr<!void>
122124
// CIR: cir.return
123125

124126
// LLVM-LABEL: @loadWithSignalFence

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