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Add macos-14 (arm64) CI (and made it pass finally) #278

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Add macos-14 (arm64) CI (and made it pass finally) #278

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a25a7f9
Run macos-13 (actual x86_64 latest) and macos-14 (arm64) CIs
cielavenir Mar 8, 2024
e079f55
Avoid using x18 register
cielavenir Mar 8, 2024
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3 changes: 2 additions & 1 deletion .github/workflows/ci.yml
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Expand Up @@ -29,7 +29,8 @@ jobs:
matrix:
os:
- ubuntu-latest
- macos-latest
- macos-13 # x86_64
- macos-14 # arm64
assembler:
- nasm
runs-on: ${{ matrix.os }}
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2 changes: 1 addition & 1 deletion erasure_code/aarch64/gf_6vect_mad_neon.S
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Expand Up @@ -61,7 +61,7 @@ x_tbl3 .req x15
x_tbl4 .req x16
x_tbl5 .req x17
x_tbl6 .req x_tbl
x_const .req x18
x_const .req x0

/* vectors */
v_mask0f .req v0
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2 changes: 1 addition & 1 deletion igzip/aarch64/igzip_decode_huffman_code_block_aarch64.S
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Expand Up @@ -273,7 +273,7 @@ declare Macros
declare_generic_reg arg2, 2, x

declare_generic_reg state, 11,x
declare_generic_reg start_out, 18,x
declare_generic_reg start_out, 29,x

declare_generic_reg read_in, 3,x
declare_generic_reg read_in_length, 4,w
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2 changes: 1 addition & 1 deletion igzip/aarch64/igzip_deflate_body_aarch64.S
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Expand Up @@ -95,7 +95,7 @@ skip_has_hist:
declare_generic_reg m_out_start, 15,x
declare_generic_reg m_out_end, 16,x
declare_generic_reg m_bits, 17,x
declare_generic_reg m_bit_count, 18,w
declare_generic_reg m_bit_count, 2,w

declare_generic_reg start_in, 19,x
declare_generic_reg end_in, 20,x
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2 changes: 1 addition & 1 deletion igzip/aarch64/igzip_deflate_finish_aarch64.S
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Expand Up @@ -97,7 +97,7 @@ skip_has_hist:
declare_generic_reg m_out_start, 15,x
declare_generic_reg m_out_end, 16,x
declare_generic_reg m_bits, 17,x
declare_generic_reg m_bit_count, 18,w
declare_generic_reg m_bit_count, 2,w

declare_generic_reg start_in, 19,x
declare_generic_reg end_in, 20,x
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2 changes: 1 addition & 1 deletion igzip/aarch64/isal_deflate_icf_body_hash_hist.S
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Expand Up @@ -107,7 +107,7 @@ void isal_deflate_icf_body_hash_hist_base(struct isal_zstream *stream);
declare_generic_reg param2, 2,x

/* local variable */
declare_generic_reg level_buf, 18,x
declare_generic_reg level_buf, 17,x
declare_generic_reg avail_in, 13,w
declare_generic_reg end_in, 13,x
declare_generic_reg start_in, 19,x
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2 changes: 1 addition & 1 deletion igzip/aarch64/isal_deflate_icf_finish_hash_hist.S
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Expand Up @@ -117,7 +117,7 @@ void isal_deflate_icf_finish_hash_hist_aarch64(struct isal_zstream *stream);
declare_generic_reg next_in, 8,x
declare_generic_reg next_out, 10,x
declare_generic_reg next_out_iter, 5,x
declare_generic_reg file_start, 18,x
declare_generic_reg file_start, 17,x
declare_generic_reg last_seen, 14,x

declare_generic_reg literal_code, 9,w
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