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Is hardware updating of A/D bits enabled when Svadu is not implemented #1846

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trdthg opened this issue Feb 10, 2025 · 1 comment
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@trdthg
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trdthg commented Feb 10, 2025

According to the spec:

If Svadu is not implemented, ADUE is read-only zero.

When hardware updating of A/D bits is disabled, the Svade extension, which mandates exceptions when A/D bits need be set, instead takes effect.

Two schemes to manage the A and D bits are defined:

  • The Svade extension: when a virtual page is accessed and the A bit is clear, or is written and the D bit is clear, a
    page-fault exception is raised.
  • When the Svade extension is not implemented, the following scheme applies.

Does this means

When the Svadu extension is not implemented

  • hardware updating of A/D bits is always enabled, and operate according to the second method
  • the Svade always takes no effect

Or when Svadu is not implemented, none of these should be adopted, and A/D should never be modified

@aswaterman
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aswaterman commented Feb 10, 2025

For historical reasons, there are three implementation options:

  • Unconditionally trap
  • Unconditionally set A/D bits
  • Choose between the first two options using the ADUE bit (a.k.a. Svadu)

Note that the RVA and RVB profiles require the traps be supported, meaning that the first and third options both conform. The middle option does not conform, so it is mostly a historical curiosity at this point.

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