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deps: V8: cherry-pick 77d515484864
Original commit message: [riscv64] Move explicit specialization into .cc file Building with Gcc-10 causes error "explicit specialization in non-namespace scope". This change fixes it. Bug: v8:12649 Change-Id: I36b2b042b336c2dfd32ba5541fdbbdb8dc8b4fd7 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/3473997 Reviewed-by: ji qiu <[email protected]> Commit-Queue: ji qiu <[email protected]> Cr-Commit-Position: refs/heads/main@{#79185} Refs: v8/v8@77d5154 PR-URL: #42067 Refs: v8/v8@b663343 Reviewed-By: Michaël Zasso <[email protected]> Reviewed-By: Jiawen Geng <[email protected]> Reviewed-By: Richard Lau <[email protected]> Reviewed-By: Colin Ihrig <[email protected]> Reviewed-By: Mary Marchini <[email protected]> Reviewed-By: Juan José Arboleda <[email protected]> Reviewed-By: James M Snell <[email protected]> Reviewed-By: Stewart X Addison <[email protected]>
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‎deps/v8/src/execution/riscv64/simulator-riscv64.cc

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#include "src/runtime/runtime-utils.h"
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#include "src/utils/ostreams.h"
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// RVV
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// The following code about RVV was based from:
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// https://github.com/riscv/riscv-isa-sim
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// Copyright (c) 2010-2017, The Regents of the University of California
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// (Regents). All Rights Reserved.
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are met:
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// 1. Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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// 2. Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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// 3. Neither the name of the Regents nor the
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// names of its contributors may be used to endorse or promote products
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// derived from this software without specific prior written permission.
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// IN NO EVENT SHALL REGENTS BE LIABLE TO ANY PARTY FOR DIRECT, INDIRECT,
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// SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING LOST PROFITS,
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// ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF
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// REGENTS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// REGENTS SPECIFICALLY DISCLAIMS ANY WARRANTIES, INCLUDING, BUT NOT LIMITED
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// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE. THE SOFTWARE AND ACCOMPANYING DOCUMENTATION, IF ANY, PROVIDED
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// HEREUNDER IS PROVIDED "AS IS". REGENTS HAS NO OBLIGATION TO PROVIDE
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// MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
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template <uint64_t N>
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struct type_usew_t;
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template <>
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struct type_usew_t<8> {
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using type = uint8_t;
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};
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template <>
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struct type_usew_t<16> {
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using type = uint16_t;
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};
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template <>
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struct type_usew_t<32> {
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using type = uint32_t;
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};
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template <>
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struct type_usew_t<64> {
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using type = uint64_t;
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};
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template <>
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struct type_usew_t<128> {
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using type = __uint128_t;
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};
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template <uint64_t N>
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struct type_sew_t;
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template <>
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struct type_sew_t<8> {
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using type = int8_t;
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};
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template <>
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struct type_sew_t<16> {
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using type = int16_t;
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};
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template <>
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struct type_sew_t<32> {
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using type = int32_t;
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};
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template <>
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struct type_sew_t<64> {
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using type = int64_t;
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};
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template <>
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struct type_sew_t<128> {
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using type = __int128_t;
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};
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#define VV_PARAMS(x) \
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type_sew_t<x>::type& vd = \
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Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_sew_t<x>::type vs1 = Rvvelt<type_sew_t<x>::type>(rvv_vs1_reg(), i); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i);
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#define VV_UPARAMS(x) \
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type_usew_t<x>::type& vd = \
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Rvvelt<type_usew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_usew_t<x>::type vs1 = Rvvelt<type_usew_t<x>::type>(rvv_vs1_reg(), i); \
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type_usew_t<x>::type vs2 = Rvvelt<type_usew_t<x>::type>(rvv_vs2_reg(), i);
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#define VX_PARAMS(x) \
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type_sew_t<x>::type& vd = \
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Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_sew_t<x>::type rs1 = (type_sew_t<x>::type)(get_register(rs1_reg())); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i);
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#define VX_UPARAMS(x) \
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type_usew_t<x>::type& vd = \
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Rvvelt<type_usew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_usew_t<x>::type rs1 = (type_usew_t<x>::type)(get_register(rs1_reg())); \
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type_usew_t<x>::type vs2 = Rvvelt<type_usew_t<x>::type>(rvv_vs2_reg(), i);
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#define VI_PARAMS(x) \
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type_sew_t<x>::type& vd = \
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Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_sew_t<x>::type simm5 = (type_sew_t<x>::type)(instr_.RvvSimm5()); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i);
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#define VI_UPARAMS(x) \
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type_usew_t<x>::type& vd = \
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Rvvelt<type_usew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_usew_t<x>::type uimm5 = (type_usew_t<x>::type)(instr_.RvvUimm5()); \
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type_usew_t<x>::type vs2 = Rvvelt<type_usew_t<x>::type>(rvv_vs2_reg(), i);
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#define VN_PARAMS(x) \
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constexpr int half_x = x >> 1; \
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type_sew_t<half_x>::type& vd = \
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Rvvelt<type_sew_t<half_x>::type>(rvv_vd_reg(), i, true); \
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type_sew_t<x>::type uimm5 = (type_sew_t<x>::type)(instr_.RvvUimm5()); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i);
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#define VN_UPARAMS(x) \
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constexpr int half_x = x >> 1; \
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type_usew_t<half_x>::type& vd = \
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Rvvelt<type_usew_t<half_x>::type>(rvv_vd_reg(), i, true); \
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type_usew_t<x>::type uimm5 = (type_usew_t<x>::type)(instr_.RvvUimm5()); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i);
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#define VXI_PARAMS(x) \
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type_sew_t<x>::type& vd = \
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Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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type_sew_t<x>::type vs1 = Rvvelt<type_sew_t<x>::type>(rvv_vs1_reg(), i); \
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type_sew_t<x>::type vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i); \
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type_sew_t<x>::type rs1 = (type_sew_t<x>::type)(get_register(rs1_reg())); \
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type_sew_t<x>::type simm5 = (type_sew_t<x>::type)(instr_.RvvSimm5());
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#define VI_XI_SLIDEDOWN_PARAMS(x, off) \
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auto& vd = Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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auto vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i + off);
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#define VI_XI_SLIDEUP_PARAMS(x, offset) \
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auto& vd = Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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auto vs2 = Rvvelt<type_sew_t<x>::type>(rvv_vs2_reg(), i - offset);
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/* Vector Integer Extension */
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#define VI_VIE_PARAMS(x, scale) \
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if ((x / scale) < 8) UNREACHABLE(); \
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auto& vd = Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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auto vs2 = Rvvelt<type_sew_t<x / scale>::type>(rvv_vs2_reg(), i);
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#define VI_VIE_UPARAMS(x, scale) \
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if ((x / scale) < 8) UNREACHABLE(); \
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auto& vd = Rvvelt<type_sew_t<x>::type>(rvv_vd_reg(), i, true); \
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auto vs2 = Rvvelt<type_usew_t<x / scale>::type>(rvv_vs2_reg(), i);
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namespace v8 {
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namespace internal {
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