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RKSimonRKSimon
committedMay 8, 2022
[Headers][X86] Replace \operation with \code{.operation}
\operation ... \endoperation are not valid doxygen commands and cause issues when -Wdocumentation is enabled (Issue #35297) This patch proposes to replace them with \code{.operation} ... \endcode blocks so that the pseudo-code is correctly retained in any documentation and downstream can use the ".operation" type for its own formatting. Differential Revision: https://reviews.llvm.org/D125170
·
llvmorg-21-initllvmorg-15.0.0-rc1
1 parent 6f9e1ea commit 6b3a111

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+80
-80
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6 files changed

+80
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‎clang/lib/Headers/avx512fintrin.h

+16-16
Original file line numberDiff line numberDiff line change
@@ -9601,15 +9601,15 @@ _mm512_cvtsi512_si32(__m512i __A) {
96019601
///
96029602
/// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions.
96039603
///
9604-
/// \operation
9604+
/// \code{.operation}
96059605
/// FOR j := 0 to 7
96069606
/// i := j*64
96079607
/// m := j*32
96089608
/// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
96099609
/// dst[i+63:i] := MEM[addr+63:addr]
96109610
/// ENDFOR
96119611
/// dst[MAX:512] := 0
9612-
/// \endoperation
9612+
/// \endcode
96139613
#define _mm512_i32logather_pd(vindex, base_addr, scale) \
96149614
_mm512_i32gather_pd(_mm512_castsi512_si256(vindex), (base_addr), (scale))
96159615

@@ -9621,7 +9621,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
96219621
///
96229622
/// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions.
96239623
///
9624-
/// \operation
9624+
/// \code{.operation}
96259625
/// FOR j := 0 to 7
96269626
/// i := j*64
96279627
/// m := j*32
@@ -9633,7 +9633,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
96339633
/// FI
96349634
/// ENDFOR
96359635
/// dst[MAX:512] := 0
9636-
/// \endoperation
9636+
/// \endcode
96379637
#define _mm512_mask_i32logather_pd(src, mask, vindex, base_addr, scale) \
96389638
_mm512_mask_i32gather_pd((src), (mask), _mm512_castsi512_si256(vindex), \
96399639
(base_addr), (scale))
@@ -9644,15 +9644,15 @@ _mm512_cvtsi512_si32(__m512i __A) {
96449644
///
96459645
/// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions.
96469646
///
9647-
/// \operation
9647+
/// \code{.operation}
96489648
/// FOR j := 0 to 7
96499649
/// i := j*64
96509650
/// m := j*32
96519651
/// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
96529652
/// dst[i+63:i] := MEM[addr+63:addr]
96539653
/// ENDFOR
96549654
/// dst[MAX:512] := 0
9655-
/// \endoperation
9655+
/// \endcode
96569656
#define _mm512_i32logather_epi64(vindex, base_addr, scale) \
96579657
_mm512_i32gather_epi64(_mm512_castsi512_si256(vindex), (base_addr), (scale))
96589658

@@ -9663,7 +9663,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
96639663
///
96649664
/// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions.
96659665
///
9666-
/// \operation
9666+
/// \code{.operation}
96679667
/// FOR j := 0 to 7
96689668
/// i := j*64
96699669
/// m := j*32
@@ -9675,7 +9675,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
96759675
/// FI
96769676
/// ENDFOR
96779677
/// dst[MAX:512] := 0
9678-
/// \endoperation
9678+
/// \endcode
96799679
#define _mm512_mask_i32logather_epi64(src, mask, vindex, base_addr, scale) \
96809680
_mm512_mask_i32gather_epi64((src), (mask), _mm512_castsi512_si256(vindex), \
96819681
(base_addr), (scale))
@@ -9686,14 +9686,14 @@ _mm512_cvtsi512_si32(__m512i __A) {
96869686
///
96879687
/// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions.
96889688
///
9689-
/// \operation
9689+
/// \code{.operation}
96909690
/// FOR j := 0 to 7
96919691
/// i := j*64
96929692
/// m := j*32
96939693
/// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
96949694
/// MEM[addr+63:addr] := v1[i+63:i]
96959695
/// ENDFOR
9696-
/// \endoperation
9696+
/// \endcode
96979697
#define _mm512_i32loscatter_pd(base_addr, vindex, v1, scale) \
96989698
_mm512_i32scatter_pd((base_addr), _mm512_castsi512_si256(vindex), (v1), (scale))
96999699

@@ -9705,7 +9705,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
97059705
///
97069706
/// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions.
97079707
///
9708-
/// \operation
9708+
/// \code{.operation}
97099709
/// FOR j := 0 to 7
97109710
/// i := j*64
97119711
/// m := j*32
@@ -9714,7 +9714,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
97149714
/// MEM[addr+63:addr] := a[i+63:i]
97159715
/// FI
97169716
/// ENDFOR
9717-
/// \endoperation
9717+
/// \endcode
97189718
#define _mm512_mask_i32loscatter_pd(base_addr, mask, vindex, v1, scale) \
97199719
_mm512_mask_i32scatter_pd((base_addr), (mask), \
97209720
_mm512_castsi512_si256(vindex), (v1), (scale))
@@ -9725,14 +9725,14 @@ _mm512_cvtsi512_si32(__m512i __A) {
97259725
///
97269726
/// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions.
97279727
///
9728-
/// \operation
9728+
/// \code{.operation}
97299729
/// FOR j := 0 to 7
97309730
/// i := j*64
97319731
/// m := j*32
97329732
/// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8
97339733
/// MEM[addr+63:addr] := a[i+63:i]
97349734
/// ENDFOR
9735-
/// \endoperation
9735+
/// \endcode
97369736
#define _mm512_i32loscatter_epi64(base_addr, vindex, v1, scale) \
97379737
_mm512_i32scatter_epi64((base_addr), \
97389738
_mm512_castsi512_si256(vindex), (v1), (scale))
@@ -9744,7 +9744,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
97449744
///
97459745
/// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions.
97469746
///
9747-
/// \operation
9747+
/// \code{.operation}
97489748
/// FOR j := 0 to 7
97499749
/// i := j*64
97509750
/// m := j*32
@@ -9753,7 +9753,7 @@ _mm512_cvtsi512_si32(__m512i __A) {
97539753
/// MEM[addr+63:addr] := a[i+63:i]
97549754
/// FI
97559755
/// ENDFOR
9756-
/// \endoperation
9756+
/// \endcode
97579757
#define _mm512_mask_i32loscatter_epi64(base_addr, mask, vindex, v1, scale) \
97589758
_mm512_mask_i32scatter_epi64((base_addr), (mask), \
97599759
_mm512_castsi512_si256(vindex), (v1), (scale))

‎clang/lib/Headers/avx512vlvnniintrin.h

+16-16
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
///
2626
/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
2727
///
28-
/// \operation
28+
/// \code{.operation}
2929
/// FOR j := 0 to 7
3030
/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
3131
/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
@@ -34,7 +34,7 @@
3434
/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
3535
/// ENDFOR
3636
/// DST[MAX:256] := 0
37-
/// \endoperation
37+
/// \endcode
3838
#define _mm256_dpbusd_epi32(S, A, B) \
3939
((__m256i)__builtin_ia32_vpdpbusd256((__v8si)(S), (__v8si)(A), (__v8si)(B)))
4040

@@ -45,7 +45,7 @@
4545
///
4646
/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
4747
///
48-
/// \operation
48+
/// \code{.operation}
4949
/// FOR j := 0 to 7
5050
/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
5151
/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
@@ -54,7 +54,7 @@
5454
/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
5555
/// ENDFOR
5656
/// DST[MAX:256] := 0
57-
/// \endoperation
57+
/// \endcode
5858
#define _mm256_dpbusds_epi32(S, A, B) \
5959
((__m256i)__builtin_ia32_vpdpbusds256((__v8si)(S), (__v8si)(A), (__v8si)(B)))
6060

@@ -65,14 +65,14 @@
6565
///
6666
/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
6767
///
68-
/// \operation
68+
/// \code{.operation}
6969
/// FOR j := 0 to 7
7070
/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
7171
/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
7272
/// DST.dword[j] := S.dword[j] + tmp1 + tmp2
7373
/// ENDFOR
7474
/// DST[MAX:256] := 0
75-
/// \endoperation
75+
/// \endcode
7676
#define _mm256_dpwssd_epi32(S, A, B) \
7777
((__m256i)__builtin_ia32_vpdpwssd256((__v8si)(S), (__v8si)(A), (__v8si)(B)))
7878

@@ -83,14 +83,14 @@
8383
///
8484
/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
8585
///
86-
/// \operation
86+
/// \code{.operation}
8787
/// FOR j := 0 to 7
8888
/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
8989
/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
9090
/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2)
9191
/// ENDFOR
9292
/// DST[MAX:256] := 0
93-
/// \endoperation
93+
/// \endcode
9494
#define _mm256_dpwssds_epi32(S, A, B) \
9595
((__m256i)__builtin_ia32_vpdpwssds256((__v8si)(S), (__v8si)(A), (__v8si)(B)))
9696

@@ -101,7 +101,7 @@
101101
///
102102
/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
103103
///
104-
/// \operation
104+
/// \code{.operation}
105105
/// FOR j := 0 to 3
106106
/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
107107
/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
@@ -110,7 +110,7 @@
110110
/// DST.dword[j] := S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
111111
/// ENDFOR
112112
/// DST[MAX:128] := 0
113-
/// \endoperation
113+
/// \endcode
114114
#define _mm_dpbusd_epi32(S, A, B) \
115115
((__m128i)__builtin_ia32_vpdpbusd128((__v4si)(S), (__v4si)(A), (__v4si)(B)))
116116

@@ -121,7 +121,7 @@
121121
///
122122
/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
123123
///
124-
/// \operation
124+
/// \code{.operation}
125125
/// FOR j := 0 to 3
126126
/// tmp1.word := Signed(ZeroExtend16(A.byte[4*j]) * SignExtend16(B.byte[4*j]))
127127
/// tmp2.word := Signed(ZeroExtend16(A.byte[4*j+1]) * SignExtend16(B.byte[4*j+1]))
@@ -130,7 +130,7 @@
130130
/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
131131
/// ENDFOR
132132
/// DST[MAX:128] := 0
133-
/// \endoperation
133+
/// \endcode
134134
#define _mm_dpbusds_epi32(S, A, B) \
135135
((__m128i)__builtin_ia32_vpdpbusds128((__v4si)(S), (__v4si)(A), (__v4si)(B)))
136136

@@ -141,14 +141,14 @@
141141
///
142142
/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
143143
///
144-
/// \operation
144+
/// \code{.operation}
145145
/// FOR j := 0 to 3
146146
/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
147147
/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
148148
/// DST.dword[j] := S.dword[j] + tmp1 + tmp2
149149
/// ENDFOR
150150
/// DST[MAX:128] := 0
151-
/// \endoperation
151+
/// \endcode
152152
#define _mm_dpwssd_epi32(S, A, B) \
153153
((__m128i)__builtin_ia32_vpdpwssd128((__v4si)(S), (__v4si)(A), (__v4si)(B)))
154154

@@ -159,14 +159,14 @@
159159
///
160160
/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
161161
///
162-
/// \operation
162+
/// \code{.operation}
163163
/// FOR j := 0 to 3
164164
/// tmp1.dword := SignExtend32(A.word[2*j]) * SignExtend32(B.word[2*j])
165165
/// tmp2.dword := SignExtend32(A.word[2*j+1]) * SignExtend32(B.word[2*j+1])
166166
/// DST.dword[j] := Saturate32(S.dword[j] + tmp1 + tmp2)
167167
/// ENDFOR
168168
/// DST[MAX:128] := 0
169-
/// \endoperation
169+
/// \endcode
170170
#define _mm_dpwssds_epi32(S, A, B) \
171171
((__m128i)__builtin_ia32_vpdpwssds128((__v4si)(S), (__v4si)(A), (__v4si)(B)))
172172

‎clang/lib/Headers/avxvnniintrin.h

+16-16
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@
5050
///
5151
/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
5252
///
53-
/// \operation
53+
/// \code{.operation}
5454
/// FOR j := 0 to 7
5555
/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
5656
/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
@@ -59,7 +59,7 @@
5959
/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
6060
/// ENDFOR
6161
/// DST[MAX:256] := 0
62-
/// \endoperation
62+
/// \endcode
6363
static __inline__ __m256i __DEFAULT_FN_ATTRS256
6464
_mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
6565
{
@@ -73,7 +73,7 @@ _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
7373
///
7474
/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
7575
///
76-
/// \operation
76+
/// \code{.operation}
7777
/// FOR j := 0 to 7
7878
/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
7979
/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
@@ -82,7 +82,7 @@ _mm256_dpbusd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
8282
/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
8383
/// ENDFOR
8484
/// DST[MAX:256] := 0
85-
/// \endoperation
85+
/// \endcode
8686
static __inline__ __m256i __DEFAULT_FN_ATTRS256
8787
_mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
8888
{
@@ -96,14 +96,14 @@ _mm256_dpbusds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
9696
///
9797
/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
9898
///
99-
/// \operation
99+
/// \code{.operation}
100100
/// FOR j := 0 to 7
101101
/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
102102
/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
103103
/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2
104104
/// ENDFOR
105105
/// DST[MAX:256] := 0
106-
/// \endoperation
106+
/// \endcode
107107
static __inline__ __m256i __DEFAULT_FN_ATTRS256
108108
_mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
109109
{
@@ -117,14 +117,14 @@ _mm256_dpwssd_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
117117
///
118118
/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
119119
///
120-
/// \operation
120+
/// \code{.operation}
121121
/// FOR j := 0 to 7
122122
/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
123123
/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
124124
/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2)
125125
/// ENDFOR
126126
/// DST[MAX:256] := 0
127-
/// \endoperation
127+
/// \endcode
128128
static __inline__ __m256i __DEFAULT_FN_ATTRS256
129129
_mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
130130
{
@@ -138,7 +138,7 @@ _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
138138
///
139139
/// This intrinsic corresponds to the <c> VPDPBUSD </c> instructions.
140140
///
141-
/// \operation
141+
/// \code{.operation}
142142
/// FOR j := 0 to 3
143143
/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
144144
/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
@@ -147,7 +147,7 @@ _mm256_dpwssds_avx_epi32(__m256i __S, __m256i __A, __m256i __B)
147147
/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4
148148
/// ENDFOR
149149
/// DST[MAX:128] := 0
150-
/// \endoperation
150+
/// \endcode
151151
static __inline__ __m128i __DEFAULT_FN_ATTRS128
152152
_mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
153153
{
@@ -161,7 +161,7 @@ _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
161161
///
162162
/// This intrinsic corresponds to the <c> VPDPBUSDS </c> instructions.
163163
///
164-
/// \operation
164+
/// \code{.operation}
165165
/// FOR j := 0 to 3
166166
/// tmp1.word := Signed(ZeroExtend16(__A.byte[4*j]) * SignExtend16(__B.byte[4*j]))
167167
/// tmp2.word := Signed(ZeroExtend16(__A.byte[4*j+1]) * SignExtend16(__B.byte[4*j+1]))
@@ -170,7 +170,7 @@ _mm_dpbusd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
170170
/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2 + tmp3 + tmp4)
171171
/// ENDFOR
172172
/// DST[MAX:128] := 0
173-
/// \endoperation
173+
/// \endcode
174174
static __inline__ __m128i __DEFAULT_FN_ATTRS128
175175
_mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
176176
{
@@ -184,14 +184,14 @@ _mm_dpbusds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
184184
///
185185
/// This intrinsic corresponds to the <c> VPDPWSSD </c> instructions.
186186
///
187-
/// \operation
187+
/// \code{.operation}
188188
/// FOR j := 0 to 3
189189
/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
190190
/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
191191
/// DST.dword[j] := __S.dword[j] + tmp1 + tmp2
192192
/// ENDFOR
193193
/// DST[MAX:128] := 0
194-
/// \endoperation
194+
/// \endcode
195195
static __inline__ __m128i __DEFAULT_FN_ATTRS128
196196
_mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
197197
{
@@ -205,14 +205,14 @@ _mm_dpwssd_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
205205
///
206206
/// This intrinsic corresponds to the <c> VPDPWSSDS </c> instructions.
207207
///
208-
/// \operation
208+
/// \code{.operation}
209209
/// FOR j := 0 to 3
210210
/// tmp1.dword := SignExtend32(__A.word[2*j]) * SignExtend32(__B.word[2*j])
211211
/// tmp2.dword := SignExtend32(__A.word[2*j+1]) * SignExtend32(__B.word[2*j+1])
212212
/// DST.dword[j] := Saturate32(__S.dword[j] + tmp1 + tmp2)
213213
/// ENDFOR
214214
/// DST[MAX:128] := 0
215-
/// \endoperation
215+
/// \endcode
216216
static __inline__ __m128i __DEFAULT_FN_ATTRS128
217217
_mm_dpwssds_avx_epi32(__m128i __S, __m128i __A, __m128i __B)
218218
{

‎clang/lib/Headers/hresetintrin.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@
2525
///
2626
/// This intrinsic corresponds to the <c> HRESET </c> instruction.
2727
///
28-
/// \operation
28+
/// \code{.operation}
2929
/// IF __eax == 0
3030
/// // nop
3131
/// ELSE
@@ -35,7 +35,7 @@
3535
/// FI
3636
/// ENDFOR
3737
/// FI
38-
/// \endoperation
38+
/// \endcode
3939
static __inline void __DEFAULT_FN_ATTRS
4040
_hreset(int __eax)
4141
{

‎clang/lib/Headers/keylockerintrin.h

+22-22
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,7 @@
4646
///
4747
/// This intrinsic corresponds to the <c> LOADIWKEY </c> instructions.
4848
///
49-
/// \operation
49+
/// \code{.operation}
5050
/// IF CPL > 0 // LOADKWKEY only allowed at ring 0 (supervisor mode)
5151
/// GP (0)
5252
/// FI
@@ -91,7 +91,7 @@
9191
/// AF := 0
9292
/// PF := 0
9393
/// CF := 0
94-
/// \endoperation
94+
/// \endcode
9595
static __inline__ void __DEFAULT_FN_ATTRS
9696
_mm_loadiwkey (unsigned int __ctl, __m128i __intkey,
9797
__m128i __enkey_lo, __m128i __enkey_hi) {
@@ -106,7 +106,7 @@ _mm_loadiwkey (unsigned int __ctl, __m128i __intkey,
106106
///
107107
/// This intrinsic corresponds to the <c> ENCODEKEY128 </c> instructions.
108108
///
109-
/// \operation
109+
/// \code{.operation}
110110
/// InputKey[127:0] := __key[127:0]
111111
/// KeyMetadata[2:0] := __htype[2:0]
112112
/// KeyMetadata[23:3] := 0 // Reserved for future usage
@@ -126,7 +126,7 @@ _mm_loadiwkey (unsigned int __ctl, __m128i __intkey,
126126
/// AF := 0
127127
/// PF := 0
128128
/// CF := 0
129-
/// \endoperation
129+
/// \endcode
130130
static __inline__ unsigned int __DEFAULT_FN_ATTRS
131131
_mm_encodekey128_u32(unsigned int __htype, __m128i __key, void *__h) {
132132
return __builtin_ia32_encodekey128_u32(__htype, (__v2di)__key, __h);
@@ -141,7 +141,7 @@ _mm_encodekey128_u32(unsigned int __htype, __m128i __key, void *__h) {
141141
///
142142
/// This intrinsic corresponds to the <c> ENCODEKEY256 </c> instructions.
143143
///
144-
/// \operation
144+
/// \code{.operation}
145145
/// InputKey[127:0] := __key_lo[127:0]
146146
/// InputKey[255:128] := __key_hi[255:128]
147147
/// KeyMetadata[2:0] := __htype[2:0]
@@ -163,7 +163,7 @@ _mm_encodekey128_u32(unsigned int __htype, __m128i __key, void *__h) {
163163
/// AF := 0
164164
/// PF := 0
165165
/// CF := 0
166-
/// \endoperation
166+
/// \endcode
167167
static __inline__ unsigned int __DEFAULT_FN_ATTRS
168168
_mm_encodekey256_u32(unsigned int __htype, __m128i __key_lo, __m128i __key_hi,
169169
void *__h) {
@@ -179,7 +179,7 @@ _mm_encodekey256_u32(unsigned int __htype, __m128i __key_lo, __m128i __key_hi,
179179
///
180180
/// This intrinsic corresponds to the <c> AESENC128KL </c> instructions.
181181
///
182-
/// \operation
182+
/// \code{.operation}
183183
/// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic.
184184
/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) ||
185185
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -202,7 +202,7 @@ _mm_encodekey256_u32(unsigned int __htype, __m128i __key_lo, __m128i __key_hi,
202202
/// AF := 0
203203
/// PF := 0
204204
/// CF := 0
205-
/// \endoperation
205+
/// \endcode
206206
static __inline__ unsigned char __DEFAULT_FN_ATTRS
207207
_mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
208208
return __builtin_ia32_aesenc128kl_u8((__v2di *)__odata, (__v2di)__idata, __h);
@@ -216,7 +216,7 @@ _mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
216216
///
217217
/// This intrinsic corresponds to the <c> AESENC256KL </c> instructions.
218218
///
219-
/// \operation
219+
/// \code{.operation}
220220
/// Handle[511:0] := MEM[__h+511:__h] // Load is not guaranteed to be atomic.
221221
/// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) ||
222222
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -241,7 +241,7 @@ _mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
241241
/// AF := 0
242242
/// PF := 0
243243
/// CF := 0
244-
/// \endoperation
244+
/// \endcode
245245
static __inline__ unsigned char __DEFAULT_FN_ATTRS
246246
_mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
247247
return __builtin_ia32_aesenc256kl_u8((__v2di *)__odata, (__v2di)__idata, __h);
@@ -255,7 +255,7 @@ _mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
255255
///
256256
/// This intrinsic corresponds to the <c> AESDEC128KL </c> instructions.
257257
///
258-
/// \operation
258+
/// \code{.operation}
259259
/// Handle[383:0] := MEM[__h+383:__h] // Load is not guaranteed to be atomic.
260260
/// IllegalHandle := (HandleReservedBitSet (Handle[383:0]) ||
261261
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -280,7 +280,7 @@ _mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
280280
/// AF := 0
281281
/// PF := 0
282282
/// CF := 0
283-
/// \endoperation
283+
/// \endcode
284284
static __inline__ unsigned char __DEFAULT_FN_ATTRS
285285
_mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
286286
return __builtin_ia32_aesdec128kl_u8((__v2di *)__odata, (__v2di)__idata, __h);
@@ -294,7 +294,7 @@ _mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
294294
///
295295
/// This intrinsic corresponds to the <c> AESDEC256KL </c> instructions.
296296
///
297-
/// \operation
297+
/// \code{.operation}
298298
/// Handle[511:0] := MEM[__h+511:__h]
299299
/// IllegalHandle := (HandleReservedBitSet (Handle[511:0]) ||
300300
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -319,7 +319,7 @@ _mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
319319
/// AF := 0
320320
/// PF := 0
321321
/// CF := 0
322-
/// \endoperation
322+
/// \endcode
323323
static __inline__ unsigned char __DEFAULT_FN_ATTRS
324324
_mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
325325
return __builtin_ia32_aesdec256kl_u8((__v2di *)__odata, (__v2di)__idata, __h);
@@ -346,7 +346,7 @@ _mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
346346
///
347347
/// This intrinsic corresponds to the <c> AESENCWIDE128KL </c> instructions.
348348
///
349-
/// \operation
349+
/// \code{.operation}
350350
/// Handle := MEM[__h+383:__h]
351351
/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) ||
352352
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -377,7 +377,7 @@ _mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) {
377377
/// AF := 0
378378
/// PF := 0
379379
/// CF := 0
380-
/// \endoperation
380+
/// \endcode
381381
static __inline__ unsigned char __DEFAULT_FN_ATTRS
382382
_mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) {
383383
return __builtin_ia32_aesencwide128kl_u8((__v2di *)__odata,
@@ -392,7 +392,7 @@ _mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
392392
///
393393
/// This intrinsic corresponds to the <c> AESENCWIDE256KL </c> instructions.
394394
///
395-
/// \operation
395+
/// \code{.operation}
396396
/// Handle[511:0] := MEM[__h+511:__h]
397397
/// IllegalHandle := ( HandleReservedBitSet (Handle[511:0]) ||
398398
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -423,7 +423,7 @@ _mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
423423
/// AF := 0
424424
/// PF := 0
425425
/// CF := 0
426-
/// \endoperation
426+
/// \endcode
427427
static __inline__ unsigned char __DEFAULT_FN_ATTRS
428428
_mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) {
429429
return __builtin_ia32_aesencwide256kl_u8((__v2di *)__odata,
@@ -438,7 +438,7 @@ _mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
438438
///
439439
/// This intrinsic corresponds to the <c> AESDECWIDE128KL </c> instructions.
440440
///
441-
/// \operation
441+
/// \code{.operation}
442442
/// Handle[383:0] := MEM[__h+383:__h]
443443
/// IllegalHandle := ( HandleReservedBitSet (Handle[383:0]) ||
444444
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -469,7 +469,7 @@ _mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
469469
/// AF := 0
470470
/// PF := 0
471471
/// CF := 0
472-
/// \endoperation
472+
/// \endcode
473473
static __inline__ unsigned char __DEFAULT_FN_ATTRS
474474
_mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) {
475475
return __builtin_ia32_aesdecwide128kl_u8((__v2di *)__odata,
@@ -484,7 +484,7 @@ _mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
484484
///
485485
/// This intrinsic corresponds to the <c> AESDECWIDE256KL </c> instructions.
486486
///
487-
/// \operation
487+
/// \code{.operation}
488488
/// Handle[511:0] := MEM[__h+511:__h]
489489
/// IllegalHandle = ( HandleReservedBitSet (Handle[511:0]) ||
490490
/// (Handle[127:0] AND (CPL > 0)) ||
@@ -515,7 +515,7 @@ _mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void*
515515
/// AF := 0
516516
/// PF := 0
517517
/// CF := 0
518-
/// \endoperation
518+
/// \endcode
519519
static __inline__ unsigned char __DEFAULT_FN_ATTRS
520520
_mm_aesdecwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* __h) {
521521
return __builtin_ia32_aesdecwide256kl_u8((__v2di *)__odata,

‎clang/lib/Headers/uintrintrin.h

+8-8
Original file line numberDiff line numberDiff line change
@@ -39,9 +39,9 @@ struct __uintr_frame
3939
///
4040
/// This intrinsic corresponds to the <c> CLUI </c> instruction.
4141
///
42-
/// \operation
42+
/// \code{.operation}
4343
/// UIF := 0
44-
/// \endoperation
44+
/// \endcode
4545
static __inline__ void __DEFAULT_FN_ATTRS
4646
_clui (void)
4747
{
@@ -60,9 +60,9 @@ _clui (void)
6060
///
6161
/// This intrinsic corresponds to the <c> STUI </c> instruction.
6262
///
63-
/// \operation
63+
/// \code{.operation}
6464
/// UIF := 1
65-
/// \endoperation
65+
/// \endcode
6666
static __inline__ void __DEFAULT_FN_ATTRS
6767
_stui (void)
6868
{
@@ -81,15 +81,15 @@ _stui (void)
8181
///
8282
/// \returns The current value of the user interrupt flag (UIF).
8383
///
84-
/// \operation
84+
/// \code{.operation}
8585
/// CF := UIF
8686
/// ZF := 0
8787
/// AF := 0
8888
/// OF := 0
8989
/// PF := 0
9090
/// SF := 0
9191
/// dst := CF
92-
/// \endoperation
92+
/// \endcode
9393
static __inline__ unsigned char __DEFAULT_FN_ATTRS
9494
_testui (void)
9595
{
@@ -110,7 +110,7 @@ _testui (void)
110110
/// Index of user-interrupt target table entry in user-interrupt target
111111
/// table.
112112
///
113-
/// \operation
113+
/// \code{.operation}
114114
/// IF __a > UITTSZ
115115
/// GP (0)
116116
/// FI
@@ -143,7 +143,7 @@ _testui (void)
143143
/// SendOrdinaryIPI(tempUPID.NV, tempUPID.NDST[15:8])
144144
/// FI
145145
/// FI
146-
/// \endoperation
146+
/// \endcode
147147
static __inline__ void __DEFAULT_FN_ATTRS
148148
_senduipi (unsigned long long __a)
149149
{

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