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NasChungHans Verkuil
NasChung
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Hans Verkuil
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media: chips-media: wave5: Add vpuapi layer
Add the vpuapi layer of the wave5 codec driver. This layer is used to configure the hardware according to the parameters. Signed-off-by: Sebastian Fricke <[email protected]> Signed-off-by: Nicolas Dufresne <[email protected]> Signed-off-by: Dafna Hirschfeld <[email protected]> Signed-off-by: Robert Beckett <[email protected]> Signed-off-by: Nas Chung <[email protected]> Signed-off-by: Hans Verkuil <[email protected]>
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‎drivers/media/platform/chips-media/wave5/wave5-hw.c

+2,554
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‎drivers/media/platform/chips-media/wave5/wave5-regdefine.h

+732
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‎drivers/media/platform/chips-media/wave5/wave5-vdi.c

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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Wave5 series multi-standard codec IP - low level access functions
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*
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* Copyright (C) 2021-2023 CHIPS&MEDIA INC
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*/
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#include <linux/bug.h>
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#include "wave5-vdi.h"
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#include "wave5-vpu.h"
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#include "wave5-regdefine.h"
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#include <linux/delay.h>
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static int wave5_vdi_allocate_common_memory(struct device *dev)
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{
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struct vpu_device *vpu_dev = dev_get_drvdata(dev);
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if (!vpu_dev->common_mem.vaddr) {
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int ret;
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vpu_dev->common_mem.size = SIZE_COMMON;
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ret = wave5_vdi_allocate_dma_memory(vpu_dev, &vpu_dev->common_mem);
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if (ret) {
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dev_err(dev, "unable to allocate common buffer\n");
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return ret;
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}
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}
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dev_dbg(dev, "[VDI] common_mem: daddr=%pad size=%zu vaddr=0x%p\n",
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&vpu_dev->common_mem.daddr, vpu_dev->common_mem.size, vpu_dev->common_mem.vaddr);
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return 0;
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}
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int wave5_vdi_init(struct device *dev)
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{
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struct vpu_device *vpu_dev = dev_get_drvdata(dev);
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int ret;
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ret = wave5_vdi_allocate_common_memory(dev);
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if (ret < 0) {
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dev_err(dev, "[VDI] failed to get vpu common buffer from driver\n");
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return ret;
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}
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if (!PRODUCT_CODE_W_SERIES(vpu_dev->product_code)) {
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WARN_ONCE(1, "unsupported product code: 0x%x\n", vpu_dev->product_code);
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return -EOPNOTSUPP;
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}
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/* if BIT processor is not running. */
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if (wave5_vdi_read_register(vpu_dev, W5_VCPU_CUR_PC) == 0) {
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int i;
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for (i = 0; i < 64; i++)
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wave5_vdi_write_register(vpu_dev, (i * 4) + 0x100, 0x0);
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}
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dev_dbg(dev, "[VDI] driver initialized successfully\n");
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return 0;
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}
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int wave5_vdi_release(struct device *dev)
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{
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struct vpu_device *vpu_dev = dev_get_drvdata(dev);
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vpu_dev->vdb_register = NULL;
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wave5_vdi_free_dma_memory(vpu_dev, &vpu_dev->common_mem);
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return 0;
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}
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void wave5_vdi_write_register(struct vpu_device *vpu_dev, u32 addr, u32 data)
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{
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writel(data, vpu_dev->vdb_register + addr);
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}
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unsigned int wave5_vdi_read_register(struct vpu_device *vpu_dev, u32 addr)
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{
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return readl(vpu_dev->vdb_register + addr);
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}
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int wave5_vdi_clear_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb)
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{
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if (!vb || !vb->vaddr) {
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dev_err(vpu_dev->dev, "%s: unable to clear unmapped buffer\n", __func__);
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return -EINVAL;
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}
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memset(vb->vaddr, 0, vb->size);
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return vb->size;
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}
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int wave5_vdi_write_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb, size_t offset,
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u8 *data, size_t len)
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{
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if (!vb || !vb->vaddr) {
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dev_err(vpu_dev->dev, "%s: unable to write to unmapped buffer\n", __func__);
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return -EINVAL;
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}
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if (offset > vb->size || len > vb->size || offset + len > vb->size) {
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dev_err(vpu_dev->dev, "%s: buffer too small\n", __func__);
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return -ENOSPC;
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}
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memcpy(vb->vaddr + offset, data, len);
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return len;
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}
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int wave5_vdi_allocate_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb)
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{
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void *vaddr;
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dma_addr_t daddr;
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if (!vb->size) {
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dev_err(vpu_dev->dev, "%s: requested size==0\n", __func__);
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return -EINVAL;
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}
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vaddr = dma_alloc_coherent(vpu_dev->dev, vb->size, &daddr, GFP_KERNEL);
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if (!vaddr)
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return -ENOMEM;
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vb->vaddr = vaddr;
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vb->daddr = daddr;
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return 0;
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}
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int wave5_vdi_free_dma_memory(struct vpu_device *vpu_dev, struct vpu_buf *vb)
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{
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if (vb->size == 0)
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return -EINVAL;
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if (!vb->vaddr)
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dev_err(vpu_dev->dev, "%s: requested free of unmapped buffer\n", __func__);
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else
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dma_free_coherent(vpu_dev->dev, vb->size, vb->vaddr, vb->daddr);
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memset(vb, 0, sizeof(*vb));
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return 0;
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}
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int wave5_vdi_allocate_array(struct vpu_device *vpu_dev, struct vpu_buf *array, unsigned int count,
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size_t size)
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{
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struct vpu_buf vb_buf;
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int i, ret = 0;
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vb_buf.size = size;
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for (i = 0; i < count; i++) {
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if (array[i].size == size)
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continue;
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if (array[i].size != 0)
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wave5_vdi_free_dma_memory(vpu_dev, &array[i]);
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ret = wave5_vdi_allocate_dma_memory(vpu_dev, &vb_buf);
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if (ret)
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return -ENOMEM;
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array[i] = vb_buf;
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}
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for (i = count; i < MAX_REG_FRAME; i++)
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wave5_vdi_free_dma_memory(vpu_dev, &array[i]);
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return 0;
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}
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void wave5_vdi_allocate_sram(struct vpu_device *vpu_dev)
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{
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struct vpu_buf *vb = &vpu_dev->sram_buf;
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if (!vpu_dev->sram_pool || !vpu_dev->sram_size)
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return;
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if (!vb->vaddr) {
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vb->size = vpu_dev->sram_size;
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vb->vaddr = gen_pool_dma_alloc(vpu_dev->sram_pool, vb->size,
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&vb->daddr);
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if (!vb->vaddr)
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vb->size = 0;
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}
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dev_dbg(vpu_dev->dev, "%s: sram daddr: %pad, size: %zu, vaddr: 0x%p\n",
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__func__, &vb->daddr, vb->size, vb->vaddr);
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}
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void wave5_vdi_free_sram(struct vpu_device *vpu_dev)
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{
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struct vpu_buf *vb = &vpu_dev->sram_buf;
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if (!vb->size || !vb->vaddr)
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return;
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if (vb->vaddr)
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gen_pool_free(vpu_dev->sram_pool, (unsigned long)vb->vaddr,
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vb->size);
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memset(vb, 0, sizeof(*vb));
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}

‎drivers/media/platform/chips-media/wave5/wave5-vdi.h

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/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
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/*
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* Wave5 series multi-standard codec IP - low level access functions
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*
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* Copyright (C) 2021-2023 CHIPS&MEDIA INC
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*/
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#ifndef _VDI_H_
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#define _VDI_H_
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#include "wave5-vpuconfig.h"
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/device.h>
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/************************************************************************/
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/* COMMON REGISTERS */
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/************************************************************************/
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#define VPU_PRODUCT_CODE_REGISTER 0x1044
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/* system register write */
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#define vpu_write_reg(VPU_INST, ADDR, DATA) wave5_vdi_write_register(VPU_INST, ADDR, DATA)
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/* system register read */
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#define vpu_read_reg(CORE, ADDR) wave5_vdi_read_register(CORE, ADDR)
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struct vpu_buf {
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size_t size;
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dma_addr_t daddr;
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void *vaddr;
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};
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int wave5_vdi_init(struct device *dev);
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int wave5_vdi_release(struct device *dev); //this function may be called only at system off.
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#endif //#ifndef _VDI_H_

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